Course syllabus
010113705-65 วิทยุซอฟต์แวร์ (Software Radio)
Course Syllabus
Data entry : Asst.Prof. Dr.Pisit Vanichchanan
1. Course number and name
010113705-65 วิทยุซอฟต์แวร์ (Software Radio)
2. Credits and contact hours
3(3-0-6)
3. Instructor’s or course coordinator’s name
Asst.Prof. Dr.Pisit Vanichchanan
4. Text book, title, author, and year
- Jouko Vankka, Digital Synthesizers and Transmitters for Software Radio, Springer, 2005.
- Steve Kilts, Advanced FPGA Design: Architecture, Implementation, and Optimization, John Wiley & Sons, 2007.
- C. Richard Johnson, Jr., William A. Sethares, and Andrew G. Klein, Software Receiver Design, Cambridge University Press, NY, 2011.
5. Specific course information
- brief description of the content of the course (catalog description)
Structures of radio transmitters and receivers; digital compensation methods for I/O modulation; direct digital synthesizers; recursive oscillators; CODIC algorithm; carrier recovery; software- defined radio standards and architectures; hardware for software-defined radio; FPGA; hardware description languages. - prerequisites or co-requisites
010113332-65 Digital Signal Processing - indicate whether a required, elective, or selected elective (as per Table 5-1) course in the program
Elective :
6. Specific goals for the course
- specific outcomes of instruction (e.g. The student will be able to explain the significance of current research about a particular topic.)
- CLO1 Be able to memorize the structures of transmitters and receivers.
- CLO2 Be able to analyze the digital compensation in I/O modulation.
- CLO3 Be able to analyze direct digital synthesizers.
- CLO4 Be able to analyze recursive oscillators.
- CLO5 Be able to use CODIC algorithm to calculate sin and/or cosine functions.
- CLO6 Be able to analyze carrier recovery.
- CLO7 Be able to explain software-defined radio standards and architectures.
- CLO8 Know how to increase speed and reduce latency of FPGA using hardware description languages.
- explicitly indicate which of the student outcomes listed in Criterion 3 or any other outcomes are addressed by the course.
ABET Student Outcome (SO) Listed in Criterion 3 Course learning outcome (CLO) SO1 an ability to identify, formulate, and solve complex engineering problems by applying principles of engineering, science, and mathematics. - CLO1 Be able to memorize the structures of transmitters and receivers.
- CLO2 Be able to analyze the digital compensation in I/O modulation.
- CLO3 Be able to analyze direct digital synthesizers.
- CLO4 Be able to analyze recursive oscillators.
- CLO5 Be able to use CODIC algorithm to calculate sin and/or cosine functions.
- CLO6 Be able to analyze carrier recovery.
7. Brief list of topics to be covered
| Week | Topic | Details | Activities |
|---|---|---|---|
| 01 | Introduction | ||
| 02 | Transmitters | ||
| 03 | Digital Compensation Methods for Analog I/O Modulator Errors | ||
| 04 | Direct Digital Synthesizers | ||
| 05 | Recursive Oscillators | ||
| 06 | CORDIC Algorithm | ||
| 07 | Sources of Noise and Spurs in DDS | ||
| 08 | Spur Reduction Techniques in Sine Output Direct Digital Synthesizer | ||
| 09 | Blocks of Direct Digital Synthesizers | ||
| 10 | Architecting Speed in FPGA | ||
| 11 | Architecting Area and Power in FPGA | ||
| 12 | Clock Domain | ||
| 13 | Carrier Recover | ||
| 14 | Frequency Recovery |
8. Course Assessment
| Course assessment | Weight score (%) | Assessment tools | Date |
|---|---|---|---|
| Formative 1 | 20 | assignment, class activity | 24 Nov 2025 - 13 Mar 2026 |
| Formative 2 | 40 | midterm examination | 02 Feb 2026 - 27 Feb 2026 |
| Summative | 40 | final examination | 26 Mar 2026 |
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